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1. general description the 74avch2t45 is a dual bit, dual supply transceiver that enables bidirectional level translation. it features two data input-output ports (na and nb), a direction control input (dir) and dual supply pins (v cc(a) and v cc(b) ). both v cc(a) and v cc(b) can be supplied at any voltage between 0.8 v and 3.6 v making the device suitable for translating between any of the low voltage nodes (0.8 v, 1.2 v, 1.5 v, 1.8 v, 2.5 v and 3.3 v). pins na and dir are referenced to v cc(a) and pins nb are referenced to v cc(b) . a high on dir allows transmission from na to nb and a low on dir allows transmission from nb to na. the device is fully speci?ed for partial power-down applications using i off . the i off circuitry disables the output, preventing any damaging back?ow current through the device when it is powered down. in suspend mode when either v cc(a) or v cc(b) are at gnd level, both a and b are in the high-impedance off-state. the 74avch2t45 has active bus hold circuitry which is provided to hold unused or ?oating data inputs at a valid logic level. this feature eliminates the need for external pull-up or pull-down resistors. 2. features n wide supply voltage range: u v cc(a) : 0.8 v to 3.6 v u v cc(b) : 0.8 v to 3.6 v n high noise immunity n complies with jedec standards: u jesd8-12 (0.8 v to 1.3 v) u jesd8-11 (0.9 v to 1.65 v) u jesd8-7 (1.2 v to 1.95 v) u jesd8-5 (1.8 v to 2.7 v) u jesd8-b (2.7 v to 3.6 v) n esd protection: u hbm jesd22-a114e class 3b exceeds 8000 v u mm jesd22-a115-a exceeds 200 v u cdm jesd22-c101c exceeds 1000 v n maximum data rates: u 500 mbps (1.8 v to 3.3 v translation) u 320 mbps (< 1.8 v to 3.3 v translation) u 320 mbps (translate to 2.5 v or 1.8 v) 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state rev. 01 3 july 2007 product data sheet
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 2 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state u 280 mbps (translate to 1.5 v) u 240 mbps (translate to 1.2 v) n suspend mode n bus hold on data inputs n latch-up performance exceeds 100 ma per jesd 78 class ii n inputs accept voltages up to 3.6 v n low noise overshoot and undershoot < 10 % of v cc n i off circuitry provides partial power-down mode operation n sot765-1 and sot833-1 package options n speci?ed from - 40 cto+85 c and - 40 c to +125 c 3. ordering information 4. marking 5. functional diagram table 1. ordering information type number package temperature range name description version 74AVCH2T45DC - 40 c to +125 c vssop8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm sot765-1 74avch2t45gt - 40 c to +125 c xson8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 1.95 0.5 mm sot833-1 table 2. marking type number marking code 74AVCH2T45DC k45 74avch2t45gt k45 fig 1. logic symbol fig 2. logic diagram 001aag577 dir 1b 2b 7 6 1a 2a 5 2 3 v cc(a) v cc(b) 001aag578 dir 1b 2b 1a 2a v cc(a) v cc(b)
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 3 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state 6. pinning information 6.1 pinning 6.2 pin description 7. functional description [1] h = high voltage level; l = low voltage level; x = dont care; z = high-impedance off-state. [2] the input circuit of the data i/o is always active. [3] the dir input circuit is referenced to v cc(a) . [4] if at least one of v cc(a) or v cc(b) is at gnd level, the device goes into suspend mode. fig 3. pin con?guration sot765-1 (vssop8) fig 4. pin con?guration sot833-1 (xson8) 74avch2t45 v cc(a) v cc(b) 1a 1b 2a 2b gnd dir 001aag583 1 2 3 4 6 5 8 7 74avch2t45 2b 1b v cc(b) dir 2a 1a v cc(a) gnd 001aag584 36 27 18 45 transparent top view table 3. pin description symbol pin description v cc(a) 1 supply voltage port a and dir 1a 2 data input or output 2a 3 data input or output gnd 4 ground (0 v) dir 5 direction control 2b 6 data input or output 1b 7 data input or output v cc(b) 8 supply voltage port b table 4. function table [1] supply voltage input input/output [2] v cc(a) , v cc(b) dir [3] na nb 0.8 v to 3.6 v l na = nb input 0.8 v to 3.6 v h input nb = na gnd [4] xzz
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 4 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state 8. limiting values [1] the minimum input voltage rating and output voltage ratings may be exceeded if the input and output current ratings are obse rved. [2] v cco is the supply voltage associated with the output port. [3] v cco + 0.5 v should not exceed 4.6 v. [4] for vssop8 package: above 110 c the value of p tot derates linearly with 8 mw/k. for xson8 package: above 45 c the value of p tot derates linearly with 2.4 mw/k. 9. recommended operating conditions [1] v cco is the supply voltage associated with the output port. table 5. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc(a) supply voltage port a - 0.5 +4.6 v v cc(b) supply voltage port b - 0.5 +4.6 v i ik input clamping current v i <0v - 50 - ma v i input voltage [1] - 0.5 +4.6 v i ok output clamping current v o <0v - 50 - ma v o output voltage active mode [1] [2] [3] - 0.5 v cco + 0.5 v suspend or 3-state mode [1] - 0.5 +4.6 v i o output current v o =0vtov cc - 50 ma i cc supply current i cc(a) or i cc(b) - 100 ma i gnd ground current - 100 - ma t stg storage temperature - 65 +150 c p tot total power dissipation t amb = - 40 c to +125 c [4] - 250 mw table 6. recommended operating conditions symbol parameter conditions min max unit v cc(a) supply voltage port a 0.8 3.6 v v cc(b) supply voltage port b 0.8 3.6 v v i input voltage 0 3.6 v v o output voltage active mode [1] 0v cco v suspend or 3-state mode 0 3.6 v t amb ambient temperature - 40 +125 c d t/ d v input transition rise and fall rate v cci =0.8 v to 3.6 v - 5 ns/v
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 5 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state 10. static characteristics table 7. static characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). all unused data inputs of the device must be held at v cci or gnd to ensure proper device operation. symbol parameter conditions min typ max unit t amb = 25 c v oh high-level output voltage v i = v ih i o = - 1.5 ma; v cc(a) =v cc(b) = 0.8 v - 0.69 - v v ol low-level output voltage v i = v il i o = 1.5 ma; v cc(a) =v cc(b) = 0.8 v - 0.07 - v i i input leakage current dir input; v i = gnd to v cc(a) ; v cc(a) =v cc(b) = 0.8 v to 3.6 v - 0.025 0.25 m a i bhl bus hold low current v i = 0.42 v; v cc(a) = v cc(b) = 1.2 v - 26 - m a i bhh bus hold high current v i = 0.78 v; v cc(a) = v cc(b) = 1.2 v - - 24 - m a i bhlo bus hold low overdrive current v i = gnd to v cci ; v cc(a) =v cc(b) = 1.2 v [1] -28- m a i bhho bus hold high overdrive current v i = gnd to v cci ; v cc(a) =v cc(b) = 1.2 v [1] - - 26 - m a i oz off-state output current a or b port; v o = gnd or v cco ; v cc(a) =v cc(b) = 0.8 v to 3.6 v [2] - 0.5 2.5 m a i off power-off leakage current a port; v i or v o = 0 v to 3.6 v; v cc(a) =0v;v cc(b) = 0.8 v to 3.6 v - 0.1 1.0 m a b port; v i or v o = 0 v to 3.6 v; v cc(b) =0v;v cc(a) = 0.8 v to 3.6 v - 0.1 1.0 m a c i input capacitance dir input; v i = gnd or 3.3 v; v cc(a) =v cc(b) = 3.3 v - 1.0 - pf c i/o input/output capacitance a and b port; suspend mode; v o =v cco or gnd; v cc(a) =v cc(b) = 3.3 v [2] - 4.0 - pf t amb = - 40 c to +85 c v ih high-level input voltage data input [1] v cci = 0.8 v 0.70 v cci -- v v cci = 1.1 v to 1.95 v 0.65 v cci -- v v cci = 2.3 v to 2.7 v 1.6 - - v v cci = 3.0 v to 3.6 v 2.0 - - v dir input [1] v cci = 0.8 v 0.70 v cc(a) -- v v cci = 1.1 v to 1.95 v 0.65 v cc(a) -- v v cci = 2.3 v to 2.7 v 1.6 - - v v cci = 3.0 v to 3.6 v 2.0 - - v
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 6 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state v il low-level input voltage data input [1] v cci = 0.8 v - - 0.30 v cci v v cci = 1.1 v to 1.95 v - - 0.35 v cci v v cci = 2.3 v to 2.7 v - - 0.7 v v cci = 3.0 v to 3.6 v - - 0.9 v dir input [1] v cci = 0.8 v - - 0.30 v cc(a) v v cci = 1.1 v to 1.95 v - - 0.35 v cc(a) v v cci = 2.3 v to 2.7 v - - 0.7 v v cci = 3.0 v to 3.6 v - - 0.9 v v oh high-level output voltage v i = v ih i o = - 100 m a; v cc(a) =v cc(b) = 0.8 v to 3.6 v [2] v cco - 0.1 - - v i o = - 3 ma; v cc(a) = v cc(b) = 1.1 v 0.85 - - v i o = - 6 ma; v cc(a) = v cc(b) = 1.4 v 1.05 - - v i o = - 8 ma; v cc(a) = v cc(b) = 1.65 v 1.2 - - v i o = - 9 ma; v cc(a) = v cc(b) = 2.3 v 1.75 - - v i o = - 12 ma; v cc(a) = v cc(b) = 3.0 v 2.3 - - v v ol low-level output voltage v i = v il i o = 100 m a; v cc(a) =v cc(b) = 0.8 v to 3.6 v - - 0.1 v i o = 3 ma; v cc(a) = v cc(b) = 1.1 v - - 0.25 v i o = 6 ma; v cc(a) = v cc(b) = 1.4 v - - 0.35 v i o = 8 ma; v cc(a) = v cc(b) = 1.65 v - - 0.45 v i o = 9 ma; v cc(a) = v cc(b) = 2.3 v - - 0.55 v i o = 12 ma; v cc(a) = v cc(b) = 3.0 v - - 0.7 v i i input leakage current dir input; v i = gnd to v cc(a) ; v cc(a) =v cc(b) = 0.8 v to 3.6 v -- 1.0 m a i bhl bus hold low current v i = 0.49 v; v cc(a) = v cc(b) = 1.4 v 15 - - m a v i = 0.58 v; v cc(a) = v cc(b) = 1.65 v 25 - - m a v i = 0.70 v; v cc(a) = v cc(b) = 2.3 v 45 - - m a v i = 0.80 v; v cc(a) = v cc(b) = 3.0 v 100 - - m a i bhh bus hold high current v i = 0.91 v; v cc(a) = v cc(b) = 1.4 v - 15 - - m a v i = 1.07 v; v cc(a) = v cc(b) = 1.65 v - 25 - - m a v i = 1.60 v; v cc(a) = v cc(b) = 2.3 v - 45 - - m a v i = 2.00 v; v cc(a) = v cc(b) = 3.0 v - 100 - - m a table 7. static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). all unused data inputs of the device must be held at v cci or gnd to ensure proper device operation. symbol parameter conditions min typ max unit
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 7 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state i bhlo bus hold low overdrive current v i = gnd to v cci [1] v cc(a) = v cc(b) = 1.6 v 125 - - m a v cc(a) = v cc(b) = 1.95 v 200 - - m a v cc(a) = v cc(b) = 2.7 v 300 - - m a v cc(a) = v cc(b) = 3.6 v 500 - - m a i bhho bus hold high overdrive current v i = gnd to v cci [1] v cc(a) = v cc(b) = 1.6 v - 125 - - m a v cc(a) = v cc(b) = 1.95 v - 200 - - m a v cc(a) = v cc(b) = 2.7 v - 300 - - m a v cc(a) = v cc(b) = 3.6 v - 500 - - m a i oz off-state output current a or b port; v o = gnd or v cco ; v cc(a) =v cc(b) = 0.8 v to 3.6 v [2] -- 5.0 m a i off power-off leakage current a port; v i or v o = 0 v to 3.6 v; v cc(a) =0v;v cc(b) = 0.8 v to 3.6 v -- 5.0 m a b port; v i or v o = 0 v to 3.6 v; v cc(b) =0v;v cc(a) = 0.8 v to 3.6 v -- 5.0 m a i cc supply current a port; v i = gnd or v cci ; i o = 0 a [1] v cc(a) = v cc(b) = 0.8 v to 3.6 v - - 8.0 m a v cc(a) = 3.6 v; v cc(b) = 0 v - - 8.0 m a v cc(a) = 0 v; v cc(b) = 3.6 v - 20- m a b port; v i = gnd or v cci ; i o = 0 a [1] v cc(a) = v cc(b) = 0.8 v to 3.6 v - - 8 m a v cc(a) = 3.6 v; v cc(b) = 0 v - 20- m a v cc(a) = 0 v; v cc(b) = 3.6 v - - 8 m a a plus b port (i cc(a) + i cc(b) ); i o = 0 a; v i = gnd or v cci ; v cc(a) =v cc(b) = 0.8 v to 3.6 v [1] --16 m a t amb = - 40 c to +125 c v ih high-level input voltage data input [1] v cci = 0.8 v 0.70 v cci -- v v cci = 1.1 v to 1.95 v 0.65 v cci -- v v cci = 2.3 v to 2.7 v 1.6 - - v v cci = 3.0 v to 3.6 v 2.0 - - v dir input [1] v cci = 0.8 v 0.70 v cc(a) -- v v cci = 1.1 v to 1.95 v 0.65 v cc(a) -- v v cci = 2.3 v to 2.7 v 1.6 - - v v cci = 3.0 v to 3.6 v 2.0 - - v table 7. static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). all unused data inputs of the device must be held at v cci or gnd to ensure proper device operation. symbol parameter conditions min typ max unit
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 8 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state v il low-level input voltage data input [1] v cci = 0.8 v - - 0.30 v cci v v cci = 1.1 v to 1.95 v - - 0.35 v cci v v cci = 2.3 v to 2.7 v - - 0.7 v v cci = 3.0 v to 3.6 v - - 0.9 v dir input [1] v cci = 0.8 v - - 0.30 v cc(a) v v cci = 1.1 v to 1.95 v - - 0.35 v cc(a) v v cci = 2.3 v to 2.7 v - - 0.7 v v cci = 3.0 v to 3.6 v - - 0.9 v v oh high-level output voltage v i = v ih i o = - 100 m a; v cc(a) =v cc(b) = 0.8 v to 3.6 v [2] v cco - 0.1 - - v i o = - 3 ma; v cc(a) = v cc(b) = 1.1 v 0.85 - - v i o = - 6 ma; v cc(a) = v cc(b) = 1.4 v 1.05 - - v i o = - 8 ma; v cc(a) = v cc(b) = 1.65 v 1.2 - - v i o = - 9 ma; v cc(a) = v cc(b) = 2.3 v 1.75 - - v i o = - 12 ma; v cc(a) = v cc(b) = 3.0 v 2.3 - - v v ol low-level output voltage v i = v il i o = 100 m a; v cc(a) =v cc(b) = 0.8 v to 3.6 v - - 0.1 v i o = 3 ma; v cc(a) = v cc(b) = 1.1 v - - 0.25 v i o = 6 ma; v cc(a) = v cc(b) = 1.4 v - - 0.35 v i o = 8 ma; v cc(a) = v cc(b) = 1.65 v - - 0.45 v i o = 9 ma; v cc(a) = v cc(b) = 2.3 v - - 0.55 v i o = 12 ma; v cc(a) = v cc(b) = 3.0 v - - 0.7 v i i input leakage current dir input; v i = gnd to v cc(a) ; v cc(a) =v cc(b) = 0.8 v to 3.6 v -- 1.5 m a i bhl bus hold low current v i = 0.49 v; v cc(a) = v cc(b) = 1.4 v 15 - - m a v i = 0.58 v; v cc(a) = v cc(b) = 1.65 v 25 - - m a v i = 0.70 v; v cc(a) = v cc(b) = 2.3 v 45 - - m a v i = 0.80 v; v cc(a) = v cc(b) = 3.0 v 90 - - m a i bhh bus hold high current v i = 0.91 v; v cc(a) = v cc(b) = 1.4 v - 15 - - m a v i = 1.07 v; v cc(a) = v cc(b) = 1.65 v - 25 - - m a v i = 1.60 v; v cc(a) = v cc(b) = 2.3 v - 45 - - m a v i = 2.00 v; v cc(a) = v cc(b) = 3.0 v - 100 - - m a table 7. static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). all unused data inputs of the device must be held at v cci or gnd to ensure proper device operation. symbol parameter conditions min typ max unit
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 9 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state [1] v cci is the supply voltage associated with the data input port. [2] v cco is the supply voltage associated with the output port. i bhlo bus hold low overdrive current v i = gnd to v cci [1] v cc(a) = v cc(b) = 1.6 v 125 - - m a v cc(a) = v cc(b) = 1.95 v 200 - - m a v cc(a) = v cc(b) = 2.7 v 300 - - m a v cc(a) = v cc(b) = 3.6 v 500 - - m a i bhho bus hold high overdrive current v i = gnd to v cci [1] v cc(a) = v cc(b) = 1.6 v - 125 - - m a v cc(a) = v cc(b) = 1.95 v - 200 - - m a v cc(a) = v cc(b) = 2.7 v - 300 - - m a v cc(a) = v cc(b) = 3.6 v - 500 - - m a i oz off-state output current a or b port; v o = gnd or v cco ; v cc(a) =v cc(b) = 0.8 v to 3.6 v [2] -- 7.5 m a i off power-off leakage current a port; v i or v o = 0 v to 3.6 v; v cc(b) =0v;v cc(a) = 0.8 v to 3.6 v -- 35 m a b port; v i or v o = 0 v to 3.6 v; v cc(b) =0v;v cc(a) = 0.8 v to 3.6 v -- 35 m a i cc supply current a port; v i = gnd or v cci ; i o = 0 a [1] v cc(a) = v cc(b) = 0.8 v to 3.6 v - - 11.5 m a v cc(a) = 3.6 v; v cc(b) = 0 v - - 11.5 m a v cc(a) = 0 v; v cc(b) = 3.6 v - 80- m a b port; v i = gnd or v cci ; i o = 0 a [1] v cc(a) = v cc(b) = 0.8 v to 3.6 v - - 11.5 m a v cc(a) = 3.6 v; v cc(b) = 0 v - 80- m a v cc(a) = 0 v; v cc(b) = 3.6 v - - 11.5 m a a plus b port (i cc(a) + i cc(b) ); i o = 0 a; v i = gnd or v cci ; v cc(a) =v cc(b) = 0.8 v to 3.6 v [1] --23 m a table 7. static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). all unused data inputs of the device must be held at v cci or gnd to ensure proper device operation. symbol parameter conditions min typ max unit
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 10 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state 11. dynamic characteristics table 8. dynamic characteristics voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 . symbol parameter conditions 25 c - 40 c to +125 c unit min typ [1] max min max (85 c) max (125 c) v cc(a) = 0.8 v t pd propagation delay a to b; see figure 5 [2] v cc(b) = 0.8 v - 15.8 - - - - ns v cc(b) = 1.1 v to 1.3 v - 8.4 - - - - ns v cc(b) = 1.4 v to 1.6 v - 8.0 - - - - ns v cc(b) = 1.65 v to 1.95 v - 8.0 - - - - ns v cc(b) = 2.3 v to 2.7 v - 8.7 - - - - ns v cc(b) = 3.0 v to 3.6 v - 9.5 - - - - ns b to a; see figure 5 [2] v cc(b) = 0.8 v - 15.8 - - - - ns v cc(b) = 1.1 v to 1.3 v - 12.7 - - - - ns v cc(b) = 1.4 v to 1.6 v - 12.4 - - - - ns v cc(b) = 1.65 v to 1.95 v - 12.2 - - - - ns v cc(b) = 2.3 v to 2.7 v - 12.0 - - - - ns v cc(b) = 3.0 v to 3.6 v - 11.8 - - - - ns t dis disable time dir to a; see figure 6 [3] v cc(b) = 0.8 v - 12.2 - - - - ns v cc(b) = 1.1 v to 1.3 v - 12.2 - - - - ns v cc(b) = 1.4 v to 1.6 v - 12.2 - - - - ns v cc(b) = 1.65 v to 1.95 v - 12.2 - - - - ns v cc(b) = 2.3 v to 2.7 v - 12.2 - - - - ns v cc(b) = 3.0 v to 3.6 v - 12.2 - - - - ns dir to b; see figure 6 [3] v cc(b) = 0.8 v - 11.7 - - - - ns v cc(b) = 1.1 v to 1.3 v - 7.9 - - - - ns v cc(b) = 1.4 v to 1.6 v - 7.6 - - - - ns v cc(b) = 1.65 v to 1.95 v - 8.2 - - - - ns v cc(b) = 2.3 v to 2.7 v - 8.7 - - - - ns v cc(b) = 3.0 v to 3.6 v - 10.2 - - - - ns
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 11 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state t en enable time dir to a; see figure 6 [4] [5] v cc(b) = 0.8 v - 27.5 - - - - ns v cc(b) = 1.1 v to 1.3 v - 20.6 - - - - ns v cc(b) = 1.4 v to 1.6 v - 20.0 - - - - ns v cc(b) = 1.65 v to 1.95 v - 20.4 - - - - ns v cc(b) = 2.3 v to 2.7 v - 20.7 - - - - ns v cc(b) = 3.0 v to 3.6 v - 22.0 - - - - ns dir to b; see figure 6 [4] [5] v cc(b) = 0.8 v - 28.0 - - - - ns v cc(b) = 1.1 v to 1.3 v - 20.6 - - - - ns v cc(b) = 1.4 v to 1.6 v - 20.2 - - - - ns v cc(b) = 1.65 v to 1.95 v - 20.2 - - - - ns v cc(b) = 2.3 v to 2.7 v - 20.9 - - - - ns v cc(b) = 3.0 v to 3.6 v - 21.7 - - - - ns v cc(a) = 1.1 v to 1.3 v t pd propagation delay a to b; see figure 5 [2] v cc(b) = 0.8 v - 12.7 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 1.0 9.0 9.9 ns v cc(b) = 1.4 v to 1.6 v - - - 0.7 6.8 7.5 ns v cc(b) = 1.65 v to 1.95 v - - - 0.6 6.1 6.8 ns v cc(b) = 2.3 v to 2.7 v - - - 0.5 5.7 6.3 ns v cc(b) = 3.0 v to 3.6 v - - - 0.5 6.1 6.8 ns b to a; see figure 5 [2] v cc(b) = 0.8 v - 8.4 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 1.0 9.0 9.9 ns v cc(b) = 1.4 v to 1.6 v - - - 0.8 8.0 8.8 ns v cc(b) = 1.65 v to 1.95 v - - - 0.7 7.7 8.5 ns v cc(b) = 2.3 v to 2.7 v - - - 0.6 7.2 8.0 ns v cc(b) = 3.0 v to 3.6 v - - - 0.5 7.1 7.9 ns table 8. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 . symbol parameter conditions 25 c - 40 c to +125 c unit min typ [1] max min max (85 c) max (125 c)
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 12 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state t dis disable time dir to a; see figure 6 [3] v cc(b) = 0.8 v - 4.9 - - - - ns v cc(b) = 1.1 v to 3.6 v - - - 2.2 8.8 9.7 ns dir to b; see figure 6 [3] v cc(b) = 0.8 v - 9.2 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 2.2 8.4 9.2 ns v cc(b) = 1.4 v to 1.6 v - - - 1.8 6.7 7.4 ns v cc(b) = 1.65 v to 1.95 v - - - 2.0 6.9 7.6 ns v cc(b) = 2.3 v to 2.7 v - - - 1.7 6.2 6.9 ns v cc(b) = 3.0 v to 3.6 v - - - 2.4 7.2 8.0 ns t en enable time dir to a; see figure 6 [4] [5] v cc(b) = 0.8 v - 17.6 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - - 17.4 19.1 ns v cc(b) = 1.4 v to 1.6 v - - - - 14.7 16.2 ns v cc(b) = 1.65 v to 1.95 v - - - - 14.6 16.1 ns v cc(b) = 2.3 v to 2.7 v - - - - 13.4 14.9 ns v cc(b) = 3.0 v to 3.6 v - - - - 14.3 15.9 ns dir to b; see figure 6 [4] [5] v cc(b) = 0.8 v - 17.6 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - - 17.8 19.6 ns v cc(b) = 1.4 v to 1.6 v - - - - 15.6 17.2 ns v cc(b) = 1.65 v to 1.95 v - - - - 14.9 16.5 ns v cc(b) = 2.3 v to 2.7 v - - - - 14.5 16.0 ns v cc(b) = 3.0 v to 3.6 v - - - - 14.9 16.5 ns table 8. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 . symbol parameter conditions 25 c - 40 c to +125 c unit min typ [1] max min max (85 c) max (125 c)
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 13 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state v cc(a) = 1.4 v to 1.6 v t pd propagation delay a to b; see figure 5 [2] v cc(b) = 0.8 v - 12.4 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 1.0 8.0 8.8 ns v cc(b) = 1.4 v to 1.6 v - - - 0.7 5.4 6.0 ns v cc(b) = 1.65 v to 1.95 v - - - 0.6 4.6 5.1 ns v cc(b) = 2.3 v to 2.7 v - - - 0.5 3.7 4.1 ns v cc(b) = 3.0 v to 3.6 v - - - 0.5 3.5 3.9 ns b to a; see figure 5 [2] v cc(b) = 0.8 v - 8.0 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 1.0 6.8 7.5 ns v cc(b) = 1.4 v to 1.6 v - - - 0.8 5.4 6.0 ns v cc(b) = 1.65 v to 1.95 v - - - 0.7 5.1 5.7 ns v cc(b) = 2.3 v to 2.7 v - - - 0.6 4.7 5.2 ns v cc(b) = 3.0 v to 3.6 v - - - 0.5 4.5 5.0 ns t dis disable time dir to a; see figure 6 [3] v cc(b) = 0.8 v - 3.8 - - - - ns v cc(b) = 1.1 v to 3.6 v - - - 1.6 6.3 7.0 ns dir to b; see figure 6 [3] v cc(b) = 0.8 v - 9.0 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 2.0 7.6 8.3 ns v cc(b) = 1.4 v to 1.6 v - - - 1.8 5.9 6.5 ns v cc(b) = 1.65 v to 1.95 v - - - 1.6 6.0 6.6 ns v cc(b) = 2.3 v to 2.7 v - - - 1.2 4.8 5.3 ns v cc(b) = 3.0 v to 3.6 v - - - 1.7 5.5 6.1 ns table 8. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 . symbol parameter conditions 25 c - 40 c to +125 c unit min typ [1] max min max (85 c) max (125 c)
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 14 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state t en enable time dir to a; see figure 6 [4] [5] v cc(b) = 0.8 v - 17.0 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - - 14.4 15.8 ns v cc(b) = 1.4 v to 1.6 v - - - - 11.3 12.5 ns v cc(b) = 1.65 v to 1.95 v - - - - 11.1 12.3 ns v cc(b) = 2.3 v to 2.7 v - - - - 9.5 10.5 ns v cc(b) = 3.0 v to 3.6 v - - - - 10.0 11.1 ns dir to b; see figure 6 [4] [5] v cc(b) = 0.8 v - 16.2 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - - 14.3 15.8 ns v cc(b) = 1.4 v to 1.6 v - - - - 11.7 13.0 ns v cc(b) = 1.65 v to 1.95 v - - - - 10.9 12.7 ns v cc(b) = 2.3 v to 2.7 v - - - - 10.0 11.1 ns v cc(b) = 3.0 v to 3.6 v - - - - 9.8 10.9 ns v cc(a) = 1.65 v to 1.95 v t pd propagation delay a to b; see figure 5 [2] v cc(b) = 0.8 v - 12.2 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 1.0 7.7 8.5 ns v cc(b) = 1.4 v to 1.6 v - - - 0.6 5.1 5.7 ns v cc(b) = 1.65 v to 1.95 v - - - 0.5 4.3 4.8 ns v cc(b) = 2.3 v to 2.7 v - - - 0.5 3.4 3.8 ns v cc(b) = 3.0 v to 3.6 v - - - 0.5 3.1 3.5 ns b to a; see figure 5 [2] v cc(b) = 0.8 v - 8.0 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 1.0 6.1 6.8 ns v cc(b) = 1.4 v to 1.6 v - - - 0.7 4.6 5.1 ns v cc(b) = 1.65 v to 1.95 v - - - 0.5 4.4 4.9 ns v cc(b) = 2.3 v to 2.7 v - - - 0.5 3.9 4.3 ns v cc(b) = 3.0 v to 3.6 v - - - 0.5 3.7 4.1 ns table 8. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 . symbol parameter conditions 25 c - 40 c to +125 c unit min typ [1] max min max (85 c) max (125 c)
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 15 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state t dis disable time dir to a; see figure 6 [3] v cc(b) = 0.8 v - 3.7 - - - - ns v cc(b) = 1.1 v to 3.6 v - - - 1.6 5.5 6.1 ns dir to b; see figure 6 [3] v cc(b) = 0.8 v - 8.8 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 1.8 7.8 8.6 ns v cc(b) = 1.4 v to 1.6 v - - - 1.8 5.7 6.3 ns v cc(b) = 1.65 v to 1.95 v - - - 1.4 5.8 6.4 ns v cc(b) = 2.3 v to 2.7 v - - - 1.0 4.5 5.0 ns v cc(b) = 3.0 v to 3.6 v - - - 1.5 5.2 5.8 ns t en enable time dir to a; see figure 6 [4] [5] v cc(b) = 0.8 v - 16.8 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - - 13.9 15.4 ns v cc(b) = 1.4 v to 1.6 v - - - - 10.3 11.4 ns v cc(b) = 1.65 v to 1.95 v - - - - 10.2 11.3 ns v cc(b) = 2.3 v to 2.7 v - - - - 8.4 9.3 ns v cc(b) = 3.0 v to 3.6 v - - - - 8.9 9.9 ns dir to b; see figure 6 [4] [5] v cc(b) = 0.8 v - 15.9 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - - 13.2 14.6 ns v cc(b) = 1.4 v to 1.6 v - - - - 10.6 11.8 ns v cc(b) = 1.65 v to 1.95 v - - - - 9.8 10.9 ns v cc(b) = 2.3 v to 2.7 v - - - - 8.9 9.9 ns v cc(b) = 3.0 v to 3.6 v - - - - 8.6 9.6 ns table 8. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 . symbol parameter conditions 25 c - 40 c to +125 c unit min typ [1] max min max (85 c) max (125 c)
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 16 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state v cc(a) = 2.3 v to 2.7 v t pd propagation delay a to b; see figure 5 [2] v cc(b) = 0.8 v - 12.0 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 1.0 7.2 8.0 ns v cc(b) = 1.4 v to 1.6 v - - - 0.5 4.7 5.2 ns v cc(b) = 1.65 v to 1.95 v - - - 0.5 3.9 4.3 ns v cc(b) = 2.3 v to 2.7 v - - - 0.5 3.0 3.3 ns v cc(b) = 3.0 v to 3.6 v - - - 0.5 2.6 2.9 ns b to a; see figure 5 [2] v cc(b) = 0.8 v - 8.7 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 1.0 5.7 6.3 ns v cc(b) = 1.4 v to 1.6 v - - - 0.6 3.8 4.2 ns v cc(b) = 1.65 v to 1.95 v - - - 0.5 3.4 3.8 ns v cc(b) = 2.3 v to 2.7 v - - - 0.5 3.0 3.3 ns v cc(b) = 3.0 v to 3.6 v - - - 0.5 2.8 3.1 ns t dis disable time dir to a; see figure 6 [3] v cc(b) = 0.8 v - 2.8 - - - - ns v cc(b) = 1.1 v to 3.6 v - - - 1.5 4.2 4.7 ns dir to b; see figure 6 [3] v cc(b) = 0.8 v - 8.7 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 1.7 7.3 8.0 ns v cc(b) = 1.4 v to 1.6 v - - - 2.0 5.2 5.8 ns v cc(b) = 1.65 v to 1.95 v - - - 1.5 5.1 5.7 ns v cc(b) = 2.3 v to 2.7 v - - - 0.6 4.2 4.7 ns v cc(b) = 3.0 v to 3.6 v - - - 1.1 4.8 5.3 ns table 8. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 . symbol parameter conditions 25 c - 40 c to +125 c unit min typ [1] max min max (85 c) max (125 c)
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 17 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state t en enable time dir to a; see figure 6 [4] [5] v cc(b) = 0.8 v - 17.4 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - - 13.0 14.3 ns v cc(b) = 1.4 v to 1.6 v - - - - 9.0 10.0 ns v cc(b) = 1.65 v to 1.95 v - - - - 8.5 9.5 ns v cc(b) = 2.3 v to 2.7 v - - - - 7.2 8.0 ns v cc(b) = 3.0 v to 3.6 v - - - - 7.6 8.4 ns dir to b; see figure 6 [4] [5] v cc(b) = 0.8 v - 14.8 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - - 11.4 12.7 ns v cc(b) = 1.4 v to 1.6 v - - - - 8.9 9.9 ns v cc(b) = 1.65 v to 1.95 v - - - - 8.1 9.0 ns v cc(b) = 2.3 v to 2.7 v - - - - 7.2 8.0 ns v cc(b) = 3.0 v to 3.6 v - - - - 6.8 7.6 ns v cc(a) = 3.0 v to 3.6 v t pd propagation delay a to b; see figure 5 [2] v cc(b) = 0.8 v - 11.8 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 1.0 7.1 7.9 ns v cc(b) = 1.4 v to 1.6 v - - - 0.5 4.5 5.0 ns v cc(b) = 1.65 v to 1.95 v - - - 0.5 3.7 4.1 ns v cc(b) = 2.3 v to 2.7 v - - - 0.5 2.8 3.1 ns v cc(b) = 3.0 v to 3.6 v - - - 0.5 2.4 2.7 ns b to a; see figure 5 [2] v cc(b) = 0.8 v - 9.5 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 1.0 6.1 6.8 ns v cc(b) = 1.4 v to 1.6 v - - - 0.6 3.6 4.0 ns v cc(b) = 1.65 v to 1.95 v - - - 0.5 3.1 3.5 ns v cc(b) = 2.3 v to 2.7 v - - - 0.5 2.6 2.9 ns v cc(b) = 3.0 v to 3.6 v - - - 0.5 2.4 2.7 ns table 8. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 . symbol parameter conditions 25 c - 40 c to +125 c unit min typ [1] max min max (85 c) max (125 c)
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 18 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state t dis disable time dir to a; see figure 6 [3] v cc(b) = 0.8 v - 3.4 - - - - ns v cc(b) = 1.1 v to 3.6 v - - - 1.5 4.7 5.2 ns dir to b; see figure 6 [3] v cc(b) = 0.8 v - 8.6 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - 1.7 7.2 7.9 ns v cc(b) = 1.4 v to 1.6 v - - - 0.7 5.5 6.1 ns v cc(b) = 1.65 v to 1.95 v - - - 0.6 5.5 6.1 ns v cc(b) = 2.3 v to 2.7 v - - - 0.7 4.1 4.6 ns v cc(b) = 3.0 v to 3.6 v - - - 1.7 4.7 5.2 ns t en enable time dir to a; see figure 6 [4] [5] v cc(b) = 0.8 v - 18.1 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - - 13.3 14.7 ns v cc(b) = 1.4 v to 1.6 v - - - - 9.1 10.1 ns v cc(b) = 1.65 v to 1.95 v - - - - 8.6 9.6 ns v cc(b) = 2.3 v to 2.7 v - - - - 6.7 7.5 ns v cc(b) = 3.0 v to 3.6 v - - - - 7.1 7.9 ns dir to b; see figure 6 [4] [5] v cc(b) = 0.8 v - 15.2 - - - - ns v cc(b) = 1.1 v to 1.3 v - - - - 11.8 13.1 ns v cc(b) = 1.4 v to 1.6 v - - - - 9.2 10.2 ns v cc(b) = 1.65 v to 1.95 v - - - - 8.4 9.3 ns v cc(b) = 2.3 v to 2.7 v - - - - 7.5 8.3 ns v cc(b) = 3.0 v to 3.6 v - - - - 7.1 7.9 ns table 8. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 . symbol parameter conditions 25 c - 40 c to +125 c unit min typ [1] max min max (85 c) max (125 c)
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 19 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state [1] all typical values are measured at nominal v cc(a) and v cc(b) . [2] t pd is the same as t plh and t phl . [3] t dis is the same as t plz and t phz . [4] t en is the same as t pzl and t pzh . [5] the enable time is a calculated value using the formula shown in section 13.4 enab le times . [6] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; s (c l v cc 2 f o ) = sum of the outputs. [7] f i = 10 mhz; v i = gnd to v cc ; t r = t f = 1 ns; c l = 0 pf; r l = w . power dissipation capacitance c pd power dissipation capacitance a port: (direction a to b); b port: (direction b to a) [6] [7] v cc(a) = v cc(b) = 0.8 v - 1 - - - - pf v cc(a) = v cc(b) = 1.2 v - 2 - - - - pf v cc(a) = v cc(b) = 1.5 v - 2 - - - - pf v cc(a) = v cc(b) = 1.8 v - 2 - - - - pf v cc(a) = v cc(b) = 2.5 v - 2 - - - - pf v cc(a) = v cc(b) = 3.3 v - 2 - - - - pf a port: (direction b to a); b port: (direction a to b) [6] [7] v cc(a) = v cc(b) = 0.8v - 9 - - - - pf v cc(a) = v cc(b) = 1.2 v - 11 - - - - pf v cc(a) = v cc(b) = 1.5 v - 11 - - - - pf v cc(a) = v cc(b) = 1.8 v - 12 - - - - pf v cc(a) = v cc(b) = 2.5 v - 14 - - - - pf v cc(a) = v cc(b) = 3.3 v - 17 - - - - pf table 8. dynamic characteristics continued voltages are referenced to gnd (groun d = 0 v); for test circuit see figure 7 . symbol parameter conditions 25 c - 40 c to +125 c unit min typ [1] max min max (85 c) max (125 c)
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 20 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state 12. waveforms [1] v cci is the supply voltage associated with the data input port. [2] v cco is the supply voltage associated with the output port. measurement points are given in t ab le 9 . v ol and v oh are typical output voltage levels that occur with the output load. fig 5. the data input (a, b) to output (b, a) propagation delay times 001aae967 a, b input b, a output t plh t phl gnd v i v oh v m v m v ol measurement points are given in t ab le 9 . v ol and v oh are typical output voltage levels that occur with the output load. fig 6. enable and disable times 001aae968 t pzl t pzh t phz t plz gnd gnd v i v cco v ol v oh v m v m v m v x v y outputs disabled outputs enabled outputs enabled output low-to-off off-to-low output high-to-off off-to-high dir input table 9. measurement points supply voltage input [1] output [2] v cc(a) , v cc(b) v m v m v x v y 1.1 v to 1.6 v 0.5 v cci 0.5 v cco v ol + 0.1 v v oh - 0.1 v 1.65 v to 2.7 v 0.5 v cci 0.5 v cco v ol + 0.15 v v oh - 0.15 v 3.0 v to 3.6 v 0.5 v cci 0.5 v cco v ol + 0.3 v v oh - 0.3 v
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 21 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state [1] v cci is the supply voltage associated with the data input port. [2] dv/dt 3 1.0 v/ns [3] v cco is the supply voltage associated with the output port. test data is given in t ab le 10 . r l = load resistance. c l = load capacitance including jig and probe capacitance. r t = termination resistance. v ext = external voltage for measuring switching times. fig 7. load circuitry for switching times v m v m t w t w 10 % 90 % 0 v v i v i negative pulse positive pulse 0 v v m v m 90 % 10 % t f t r t r t f 001aae331 v ext v cc v i v o dut c l r t r l r l pulse generator table 10. test data supply voltage input load v ext v cc(a) , v cc(b) v i [1] d t/ d v [2] c l r l t plh , t phl t pzh , t phz t pzl , t plz [3] 1.1 v to 1.6 v v cci 1.0 ns/v 15 pf 2 k w open gnd 2 v cco 1.65 v to 2.7 v v cci 1.0 ns/v 15 pf 2 k w open gnd 2 v cco 3.0 v to 3.6 v v cci 1.0 ns/v 15 pf 2 k w open gnd 2 v cco
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 22 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state 13. application information 13.1 unidirectional logic level-shifting application the circuit given in figure 8 is an example of the 74avch2t45 being used in an unidirectional logic level-shifting application. fig 8. unidirectional logic level-shifting application table 11. unidirectional logic level-shifting application pin name function description 1v cc(a) v cc1 supply voltage of system-1 (0.8 v to 3.6 v) 2 1a out1 output level depends on v cc1 voltage 3 2a out2 output level depends on v cc1 voltage 4 gnd gnd device gnd 5 dir dir the gnd (low level) determines b port to a port direction 6 2b in2 input threshold value depends on v cc2 voltage 7 1b in1 input threshold value depends on v cc2 voltage 8v cc(b) v cc2 supply voltage of system-2 (0.8 v to 3.6 v) 74avch2t45 v cc(a) v cc1 v cc1 v cc1 v cc2 v cc(b) 1a system-1 1b 2a 2b gnd dir 001aag585 1 2 3 4 6 5 8 7 system-2 v cc2 v cc2
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 23 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state 13.2 bidirectional logic level-shifting application figure 9 shows the 74avch2t45 being used in a bidirectional logic level-shifting application. since the device does not have an output enable (oe) pin, the system designer should take precautions to avoid bus contention between system-1 and system-2 when changing directions. t ab le 12 gives a sequence that will illustrate data transmission from system-1 to system-2 and then from system-2 to system-1. [1] h = high voltage level; l = low voltage level; z = high-impedance off-state. fig 9. bidirectional logic level-shifting application table 12. bidirectional logic level-shifting application [1] state dir ctrl i/o-1 i/o-2 description 1 h output input system-1 data to system-2 2 h z z system-2 is getting ready to send data to system-1. i/o-1 and i/o-2 are disabled. the bus-line state depends on bus hold. 3 l z z dir bit is set low. i/o-1 and i/o-2 still are disabled. the bus-line state depends on bus hold. 4 l input output system-2 data to system-1 74avch2t45 v cc(a) i/o-1 dir ctrl dir ctrl v cc1 v cc1 v cc2 v cc(b) 1a system-1 1b 2a 2b gnd dir 001aag586 1 2 3 4 6 5 8 7 system-2 i/o-2 v cc2
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 24 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state 13.3 power-up considerations the device is designed such that no special power-up sequence is required other than gnd being applied ?rst. 13.4 enable times calculate the enable times for the 74avch2t45 using the following formulas: ? t en (dir to na) = t dis (dir to nb) + t pd (nb to na) ? t en (dir to nb) = t dis (dir to na) + t pd (na to nb) in a bidirectional application, these enable times provide the maximum delay from the time the dir bit is switched until an output is expected. for example, if the 74avch2t45 initially is transmitting from a to b, then the dir bit is switched, the b port of the device must be disabled before presenting it with an input. after the b port has been disabled, an input signal applied to it appears on the corresponding a port after the speci?ed propagation delay. table 13. typical total supply current (i cc(a) + i cc(b) ) v cc(a) v cc(b) unit 0 v 0.8 v 1.2 v 1.5 v 1.8 v 2.5 v 3.3 v 0 v 0 0.1 0.1 0.1 0.1 0.1 0.1 m a 0.8 v 0.1 0.1 0.1 0.1 0.1 0.7 2.3 m a 1.2 v 0.1 0.1 0.1 0.1 0.1 0.3 1.4 m a 1.5 v 0.1 0.1 0.1 0.1 0.1 0.1 0.9 m a 1.8 v 0.1 0.1 0.1 0.1 0.1 0.1 0.5 m a 2.5 v 0.1 0.7 0.3 0.1 0.1 0.1 0.1 m a 3.3 v 0.1 2.3 1.4 0.9 0.5 0.1 0.1 m a
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 25 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state 14. package outline fig 10. package outline sot765-1 (vssop8) unit a 1 a max. a 2 a 3 b p l h e l p wy v ce d (1) e (2) z (1) q references outline version european projection issue date iec jedec jeita mm 0.15 0.00 0.85 0.60 0.27 0.17 0.23 0.08 2.1 1.9 2.4 2.2 0.5 3.2 3.0 0.4 0.1 8 0 0.13 0.1 0.2 0.4 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.40 0.15 q 0.21 0.19 sot765-1 mo-187 02-06-07 w m b p d z e 0.12 14 8 5 q a 2 a 1 q l p (a 3 ) detail x a l h e e c v m a x a y 2.5 5 mm 0 scale vssop8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm sot765-1 1 pin 1 index
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 26 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state fig 11. package outline sot833-1 (xson8) terminal 1 index area references outline version european projection issue date iec jedec jeita sot833-1 - - - mo-252 - - - sot833-1 04-07-22 04-11-09 dimensions (mm are the original dimensions) xson8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 e 1 0 1 2 mm scale notes 1. including plating thickness. 2. can be visible in some manufacturing processes. unit mm 0.25 0.17 2.0 1.9 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.5 0.6 a (1) max 0.5 0.04 1 8 2 7 3 6 4 5 8 (2) 4 (2) a
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 27 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state 15. abbreviations 16. revision history table 14. abbreviations acronym description cdm charged device model cmos complementary metal oxide semiconductor dut device under test esd electrostatic discharge hbm human body model mm machine model table 15. revision history document id release date data sheet status change notice supersedes 74avch2t45_1 20070703 product data sheet - -
74avch2t45_1 ? nxp b.v. 2007. all rights reserved. product data sheet rev. 01 3 july 2007 28 of 29 nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state 17. legal information 17.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 17.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 17.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 17.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 18. contact information for additional information, please visit: http://www .nxp.com for sales of?ce addresses, send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors 74avch2t45 dual-bit, dual-supply voltage level translator/transceiver; 3-state ? nxp b.v. 2007. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 3 july 2007 document identifier: 74avch2t45_1 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 19. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 functional description . . . . . . . . . . . . . . . . . . . 3 8 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 9 recommended operating conditions. . . . . . . . 4 10 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 11 dynamic characteristics . . . . . . . . . . . . . . . . . 10 12 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 13 application information. . . . . . . . . . . . . . . . . . 22 13.1 unidirectional logic level-shifting application. . 22 13.2 bidirectional logic level-shifting application. . . 23 13.3 power-up considerations . . . . . . . . . . . . . . . . 24 13.4 enable times . . . . . . . . . . . . . . . . . . . . . . . . . . 24 14 package outline . . . . . . . . . . . . . . . . . . . . . . . . 25 15 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 27 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 27 17 legal information. . . . . . . . . . . . . . . . . . . . . . . 28 17.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 28 17.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 17.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 17.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 18 contact information. . . . . . . . . . . . . . . . . . . . . 28 19 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

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